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2026/05/03 20:36 sep_note – admin +1 B
2026/05/03 20:33 soc_xilinx:creazionesoc.mp4 – created admin +156.4 MB
2026/05/03 20:07 soc_xilinx:ub33_vitisparte1.mp4 – created admin +128.3 MB
2026/05/03 20:07 soc_xilinx:ub33_vitisparte2.mp4 – created admin +46.3 MB
2026/05/03 20:07 soc_xilinx:ub33_vivado.mp4 – created admin +25.6 MB
2026/05/03 20:07 soc_xilinx:ub33.zip – created admin +18.5 MB
2026/05/03 20:07 soc_xilinx:note_sul_protocollo_di_bus_axi.pdf – created admin +353.5 KB
2026/05/03 20:07 soc_xilinx:axislave_listing.pdf – created admin +159.2 KB
2026/05/03 20:05 soc_xilinx:costruzione_soc_250514.pdf – created admin +917.3 KB
2026/04/22 06:33 arith:aritmetica_parte2_v01.pdf – created admin +455.3 KB
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2026/03/04 21:24 vhdl:note:main.pdf – created admin +1.4 MB
2026/02/26 19:50 slp:software:istallazione_vitis_vivado.pdf – created admin +7.7 MB
2024/06/25 18:33 vhdl:sigmadeltasimple.png – created admin +104.5 KB
2023/03/28 10:34 vhdl:driverl298n.jpg – created admin +137.9 KB
2023/03/28 10:27 vhdl:motencoder.jpg – created admin +226.6 KB
2022/11/06 13:23 arith:aritmetica_parte2.pdf – created admin +295.7 KB
2022/11/06 13:23 arith:aritmetica_parte1.pdf – created admin +520.9 KB
2022/10/10 14:23 ghdl:note:note_vhdl_221010.pdf – created admin +1.3 MB
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