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#include "design_1_xbar_0_sc.h"

#include "axi_crossbar.h"

#include <map>
#include <string>

design_1_xbar_0_sc::design_1_xbar_0_sc(const sc_core::sc_module_name& nm) : sc_core::sc_module(nm), mp_impl(NULL)
{
  // configure connectivity manager
  xsc::utils::xsc_sim_manager::addInstance("design_1_xbar_0", this);

  // initialize module
    xsc::common_cpp::properties model_param_props;
    model_param_props.addLong("C_NUM_SLAVE_SLOTS", "1");
    model_param_props.addLong("C_NUM_MASTER_SLOTS", "5");
    model_param_props.addLong("C_AXI_ID_WIDTH", "1");
    model_param_props.addLong("C_AXI_ADDR_WIDTH", "32");
    model_param_props.addLong("C_AXI_DATA_WIDTH", "32");
    model_param_props.addLong("C_AXI_PROTOCOL", "2");
    model_param_props.addLong("C_NUM_ADDR_RANGES", "1");
    model_param_props.addLong("C_AXI_SUPPORTS_USER_SIGNALS", "0");
    model_param_props.addLong("C_AXI_AWUSER_WIDTH", "1");
    model_param_props.addLong("C_AXI_ARUSER_WIDTH", "1");
    model_param_props.addLong("C_AXI_WUSER_WIDTH", "1");
    model_param_props.addLong("C_AXI_RUSER_WIDTH", "1");
    model_param_props.addLong("C_AXI_BUSER_WIDTH", "1");
    model_param_props.addLong("C_R_REGISTER", "1");
    model_param_props.addLong("C_CONNECTIVITY_MODE", "0");
    model_param_props.addString("C_FAMILY", "artix7");
    model_param_props.addBitString("C_M_AXI_BASE_ADDR", "00000000000000000000000000000000010001001010000000000000000000000000000000000000000000000000000001000001110000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000010000000110000000000000000000000000000000000000000000000000000001000001001000000000000000000000", 320);
    model_param_props.addBitString("C_M_AXI_ADDR_WIDTH", "0000000000000000000000000001000000000000000000000000000000010000000000000000000000000000000100000000000000000000000000000001000000000000000000000000000000010000", 160);
    model_param_props.addBitString("C_S_AXI_BASE_ID", "00000000000000000000000000000000", 32);
    model_param_props.addBitString("C_S_AXI_THREAD_ID_WIDTH", "00000000000000000000000000000000", 32);
    model_param_props.addBitString("C_M_AXI_WRITE_CONNECTIVITY", "0000000000000000000000000000000100000000000000000000000000000001000000000000000000000000000000010000000000000000000000000000000100000000000000000000000000000001", 160);
    model_param_props.addBitString("C_M_AXI_READ_CONNECTIVITY", "0000000000000000000000000000000100000000000000000000000000000001000000000000000000000000000000010000000000000000000000000000000100000000000000000000000000000001", 160);
    model_param_props.addBitString("C_S_AXI_SINGLE_THREAD", "00000000000000000000000000000001", 32);
    model_param_props.addBitString("C_S_AXI_WRITE_ACCEPTANCE", "00000000000000000000000000000001", 32);
    model_param_props.addBitString("C_S_AXI_READ_ACCEPTANCE", "00000000000000000000000000000001", 32);
    model_param_props.addBitString("C_M_AXI_WRITE_ISSUING", "0000000000000000000000000000000100000000000000000000000000000001000000000000000000000000000000010000000000000000000000000000000100000000000000000000000000000001", 160);
    model_param_props.addBitString("C_M_AXI_READ_ISSUING", "0000000000000000000000000000000100000000000000000000000000000001000000000000000000000000000000010000000000000000000000000000000100000000000000000000000000000001", 160);
    model_param_props.addBitString("C_S_AXI_ARB_PRIORITY", "00000000000000000000000000000000", 32);
    model_param_props.addBitString("C_M_AXI_SECURE", "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", 160);
    model_param_props.addString("COMPONENT_NAME", "design_1_xbar_0");

  mp_impl = new axi_crossbar("inst", model_param_props);

  // initialize AXI sockets
  target_0_rd_socket = mp_impl->target_0_rd_socket;
  target_0_wr_socket = mp_impl->target_0_wr_socket;
  initiator_0_rd_socket = mp_impl->initiator_0_rd_socket;
  initiator_0_wr_socket = mp_impl->initiator_0_wr_socket;
  initiator_1_rd_socket = mp_impl->initiator_1_rd_socket;
  initiator_1_wr_socket = mp_impl->initiator_1_wr_socket;
  initiator_2_rd_socket = mp_impl->initiator_2_rd_socket;
  initiator_2_wr_socket = mp_impl->initiator_2_wr_socket;
  initiator_3_rd_socket = mp_impl->initiator_3_rd_socket;
  initiator_3_wr_socket = mp_impl->initiator_3_wr_socket;
  initiator_4_rd_socket = mp_impl->initiator_4_rd_socket;
  initiator_4_wr_socket = mp_impl->initiator_4_wr_socket;
}

design_1_xbar_0_sc::~design_1_xbar_0_sc()
{
  xsc::utils::xsc_sim_manager::clean();

  delete mp_impl;
}

